{"id":10662,"date":"2026-07-20T09:42:36","date_gmt":"2026-07-20T09:42:36","guid":{"rendered":"https:\/\/ic-vendor.com\/sn74lvc2g132dcur\/"},"modified":"2026-07-20T09:42:36","modified_gmt":"2026-07-20T09:42:36","slug":"sn74lvc2g132dcur","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/sn74lvc2g132dcur\/","title":{"rendered":"SN74LVC2G132DCUR"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The SN74LVC2G132DCUR from Texas Instruments is a dual 2-input Schmitt-trigger NAND gate in a VSSOP-8 (DCU) package. Operating from 1.65V to 5.5V, it features overvoltage-tolerant inputs, 5.3 ns propagation delay at 3.3V, and Ioff partial-power-down support, making it ideal for noise-immune logic and level-shifting in portable and industrial systems.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>Logic Function<\/td>\n<td>Dual 2-input NAND with Schmitt trigger<\/td>\n<\/tr>\n<tr>\n<td>\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n<td>1.65V &#8211; 5.5V<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n<td>5.3 ns max @ 3.3V<\/td>\n<\/tr>\n<tr>\n<td>Output Drive<\/td>\n<td>+\/-24 mA @ 3.3V<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u064a\u0627\u0631 \u0627\u0644\u062a\u0647\u062f\u0626\u0629<\/td>\n<td>10 uA max<\/td>\n<\/tr>\n<tr>\n<td>Input Overvoltage<\/td>\n<td>Up to 5.5V<\/td>\n<\/tr>\n<tr>\n<td>\u0645\u0639\u062f\u0644 \u0627\u0644\u0628\u064a\u0627\u0646\u0627\u062a<\/td>\n<td>100 Mbps max<\/td>\n<\/tr>\n<tr>\n<td>\u062f\u0639\u0645 Ioff<\/td>\n<td>Yes (partial power-down)<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>VSSOP-8 (2&#215;3.1 mm)<\/td>\n<\/tr>\n<tr>\n<td>Temperature<\/td>\n<td>-40 \u0625\u0644\u0649 +125 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>Schmitt-trigger inputs provide hysteresis for noise immunity on slow or noisy signals<\/li>\n<li>Overvoltage-tolerant inputs up to 5.5V for mixed-voltage systems<\/li>\n<li>Ioff circuitry supports partial-power-down and live insertion<\/li>\n<li>Supports down-translation from 5V to 3.3V or 3.3V to 1.8V<\/li>\n<li>ESD protection exceeds 2000V HBM, 200V MM, 1000V CDM<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>Signal debouncing and pulse shaping for mechanical switches<\/li>\n<li>Control logic sequencing with noise-immune inputs<\/li>\n<li>Voltage level translation in mixed-voltage systems<\/li>\n<li>Low-power portable device logic interfaces<\/li>\n<li>IoT module and microcontroller interface circuits<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The SN74LVC2G132DCUR from Texas Instruments is a dual 2-input Schmitt-trigger NAND gate in a VSSOP-8 (DCU) package. Operating from 1.65V to 5.5V, it features overvoltage-tolerant inputs, 5.3 ns propagation delay at 3.3V, and Ioff partial-power-down support, making it ideal for noise-immune logic and level-shifting in portable and industrial systems. Key Specifications Logic Function [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13],"tags":[2003],"chip_brand":[138],"class_list":["post-10662","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","tag-sn74lvc2g132dcur","chip_brand-ti"],"acf":{"brief_explanation":"Dual 2-input Schmitt-trigger NAND gate, 1.65-5.5V, 5.3ns tpd, VSSOP-8","date_code":"","package_case":"VSSOP-8 (DCU) 2x3.1 mm","in_stock":14795,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74lvc2g132.pdf","price":"$0.1062 @ 6ku","product_introduction":"The SN74LVC2G132 is a dual 2-input Schmitt-trigger NAND gate from Texas Instruments, designed for 1.65V to 5.5V operation. The Schmitt-trigger input architecture provides different threshold levels for positive and negative transitions, creating hysteresis that makes the device highly tolerant to slow or noisy input signals. With overvoltage-tolerant inputs up to 5.5V and Ioff partial-power-down support, it is well-suited for mixed-voltage and hot-insertion applications in portable and industrial systems.","working_principle":"The device contains two independent 2-input NAND gates with Schmitt-trigger inputs. Each gate performs the Boolean function Y = A . B (positive logic), where the output goes LOW only when both inputs are HIGH. The Schmitt-trigger architecture provides hysteresis between the positive-going (VT+) and negative-going (VT-) input thresholds, eliminating output oscillation on slow or noisy input transitions. The Ioff circuitry disables outputs when VCC is 0V, preventing backflow current during partial-power-down conditions.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Function<\/th><\/tr><tr><td>1<\/td><td>1A<\/td><td>Input<\/td><td>Gate 1 input A<\/td><\/tr><tr><td>2<\/td><td>1B<\/td><td>Input<\/td><td>Gate 1 input B<\/td><\/tr><tr><td>3<\/td><td>2A<\/td><td>Input<\/td><td>Gate 2 input A<\/td><\/tr><tr><td>4<\/td><td>GND<\/td><td>Power<\/td><td>Ground<\/td><\/tr><tr><td>5<\/td><td>2B<\/td><td>Input<\/td><td>Gate 2 input B<\/td><\/tr><tr><td>6<\/td><td>VCC<\/td><td>Power<\/td><td>Supply (1.65-5.5V)<\/td><\/tr><tr><td>7<\/td><td>1Y<\/td><td>Output<\/td><td>Gate 1 output<\/td><\/tr><tr><td>8<\/td><td>2Y<\/td><td>Output<\/td><td>Gate 2 output<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Switch debouncing: Schmitt-trigger hysteresis cleans up mechanical contact bounce<\/li><li>Signal conditioning: noise rejection on slow-edge signals in industrial environments<\/li><li>Voltage level translation: 5V-to-3.3V or 3.3V-to-1.8V down-translation<\/li><li>Control logic: robust NAND function in noisy automotive or industrial systems<\/li><li>Battery-powered devices: low 10 uA quiescent current for portable applications<\/li><\/ul>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>TI<\/td><td>SN74LVC2G132DCTR<\/td><td>SSOP-8<\/td><td>Same function, SSOP package<\/td><\/tr><tr><td>TI<\/td><td>SN74LVC1G14DCKR<\/td><td>SC-70-5<\/td><td>Single Schmitt inverter<\/td><\/tr><tr><td>TI<\/td><td>SN74LVC2G17DCUR<\/td><td>VSSOP-8<\/td><td>Dual Schmitt buffer (non-inverting)<\/td><\/tr><tr><td>Nexperia<\/td><td>74LVC2G132GW<\/td><td>TSSOP-8<\/td><td>Pin-compatible alternative<\/td><\/tr><tr><td>onsemi<\/td><td>MC74VHC2G132DTG<\/td><td>VSSOP-8<\/td><td>Similar function, VHC family<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10662","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=10662"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10662\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=10662"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=10662"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=10662"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=10662"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}