{"id":10664,"date":"2026-07-20T09:42:40","date_gmt":"2026-07-20T09:42:40","guid":{"rendered":"https:\/\/ic-vendor.com\/sn74avc4t774rsvr\/"},"modified":"2026-07-20T09:42:40","modified_gmt":"2026-07-20T09:42:40","slug":"sn74avc4t774rsvr","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/sn74avc4t774rsvr\/","title":{"rendered":"SN74AVC4T774RSVR"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>The SN74AVC4T774RSVR from Texas Instruments is a 4-bit dual-supply bus transceiver with configurable voltage-level shifting and 3-state outputs, housed in a UQFN-16 (RSV) package. It provides independent direction control per channel, supports data rates up to 380 Mbps, and operates across 1.1V to 3.6V dual rails, making it ideal for SPI, UART, and JTAG level translation.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>Bits<\/td>\n<td>4<\/td>\n<\/tr>\n<tr>\n<td>Max Data Rate<\/td>\n<td>380 Mbps (1.8V to 3.3V)<\/td>\n<\/tr>\n<tr>\n<td>Voltage Range (A\/B Port)<\/td>\n<td>1.1V &#8211; 3.6V each<\/td>\n<\/tr>\n<tr>\n<td>I\/O Tolerance<\/td>\n<td>4.6V<\/td>\n<\/tr>\n<tr>\n<td>Direction Control<\/td>\n<td>Independent per channel (DIR1-4)<\/td>\n<\/tr>\n<tr>\n<td>Output Enable<\/td>\n<td>OE (active low, referenced to VCCA)<\/td>\n<\/tr>\n<tr>\n<td>\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n<td>4 ns (typical)<\/td>\n<\/tr>\n<tr>\n<td>Supply Current<\/td>\n<td>16 uA max (ICCA+ICCB)<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>UQFN-16 (RSV) 2.6&#215;1.8 mm<\/td>\n<\/tr>\n<tr>\n<td>Temperature<\/td>\n<td>-40 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>Independent direction control for each of the 4 channels<\/li>\n<li>Fully configurable dual-rail design for universal low-voltage translation<\/li>\n<li>I\/O pins are 4.6V tolerant for robustness in mixed-voltage systems<\/li>\n<li>Ioff partial-power-down support prevents backflow current<\/li>\n<li>ESD protection exceeds 8000V HBM and 1500V CDM<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<ul>\n<li>SPI, UART, and JTAG interface level translation between processors and peripherals<\/li>\n<li>Multi-voltage MCU peripheral interfacing<\/li>\n<li>FPGA and ASIC I\/O voltage bridging<\/li>\n<li>Portable electronics with mixed 1.2V\/1.8V\/2.5V\/3.3V rails<\/li>\n<li>Hot-insertion and partial-power-down system designs<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The SN74AVC4T774RSVR from Texas Instruments is a 4-bit dual-supply bus transceiver with configurable voltage-level shifting and 3-state outputs, housed in a UQFN-16 (RSV) package. It provides independent direction control per channel, supports data rates up to 380 Mbps, and operates across 1.1V to 3.6V dual rails, making it ideal for SPI, UART, and [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[2005],"chip_brand":[138],"class_list":["post-10664","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","tag-sn74avc4t774rsvr","chip_brand-ti"],"acf":{"brief_explanation":"4-bit dual-supply level translator, 380Mbps, 1.1-3.6V, independent DIR per channel, UQFN-16","date_code":"","package_case":"UQFN-16 (RSV) 2.6x1.8 mm","in_stock":7886,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/sn74avc4t774.pdf","price":"$0.620 @ 1ku","product_introduction":"The SN74AVC4T774 is a 4-bit noninverting bus transceiver with configurable dual-supply voltage-level shifting from Texas Instruments. Each channel features independent direction control (DIR1-DIR4), allowing simultaneous bi-directional translation in different directions. The A and B ports operate independently over 1.1V to 3.6V, enabling universal translation between 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V nodes. The OE and DIR control inputs are referenced to VCCA. Ioff circuitry and VCC isolation ensure robust behavior during power sequencing.","working_principle":"The device uses dual-rail level-shifting buffers between the A port (referenced to VCCA) and B port (referenced to VCCB). Each of the 4 channels has an independent DIR control: when DIR is HIGH and OE is LOW, data flows from A to B; when DIR is LOW and OE is LOW, data flows from B to A. When OE is HIGH, both ports enter the high-impedance state. The control inputs are referenced to VCCA. Ioff circuitry disables all outputs when either supply is at 0V, and VCC isolation places both ports in high-Z if either VCC input is grounded.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Type<\/th><th>Function<\/th><\/tr><tr><td>1<\/td><td>VCCA<\/td><td>Power<\/td><td>A-port supply (1.1-3.6V)<\/td><\/tr><tr><td>2<\/td><td>DIR1<\/td><td>Input<\/td><td>Direction control for Ch1 (ref VCCA)<\/td><\/tr><tr><td>3<\/td><td>A1<\/td><td>I\/O<\/td><td>Channel 1 A-port<\/td><\/tr><tr><td>4<\/td><td>B1<\/td><td>I\/O<\/td><td>Channel 1 B-port<\/td><\/tr><tr><td>5<\/td><td>OE<\/td><td>Input<\/td><td>Output enable (active low, ref VCCA)<\/td><\/tr><tr><td>6<\/td><td>GND<\/td><td>Power<\/td><td>Ground<\/td><\/tr><tr><td>7<\/td><td>VCCB<\/td><td>Power<\/td><td>B-port supply (1.1-3.6V)<\/td><\/tr><tr><td>8<\/td><td>DIR2<\/td><td>Input<\/td><td>Direction control for Ch2<\/td><\/tr><tr><td>9<\/td><td>A2<\/td><td>I\/O<\/td><td>Channel 2 A-port<\/td><\/tr><tr><td>10<\/td><td>B2<\/td><td>I\/O<\/td><td>Channel 2 B-port<\/td><\/tr><\/table>","application_scenarios":"<ul><li>MCU SPI peripheral interfacing: 1.8V MCU to 3.3V SPI device translation<\/li><li>FPGA I\/O bridging: translate between FPGA core and I\/O voltages<\/li><li>Multi-voltage SoC interfaces: independent DIR per channel for bidirectional buses<\/li><li>JTAG level shifting: translate debug interface between different voltage domains<\/li><li>Hot-insertion systems: Ioff protection during card insertion\/removal<\/li><\/ul>","alternative_models":"<table><tr><th>Manufacturer<\/th><th>Part Number<\/th><th>Package<\/th><th>Notes<\/th><\/tr><tr><td>TI<\/td><td>SN74AVC4T774PWR<\/td><td>TSSOP-16<\/td><td>Same function, TSSOP package<\/td><\/tr><tr><td>TI<\/td><td>SN74AVC4T774BQBR<\/td><td>WQFN-16<\/td><td>Same function, WQFN package<\/td><\/tr><tr><td>TI<\/td><td>TXB0104PWR<\/td><td>TSSOP-14<\/td><td>Auto-direction 4-bit translator<\/td><\/tr><tr><td>Nexperia<\/td><td>74AVC4T774BQ<\/td><td>DHVQFN-16<\/td><td>Pin-compatible alternative<\/td><\/tr><tr><td>TI<\/td><td>SN74AVC8T245RHLR<\/td><td>VQFN-24<\/td><td>8-bit version with direction control<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10664","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=10664"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10664\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=10664"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=10664"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=10664"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=10664"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}