{"id":10693,"date":"2026-07-20T10:11:42","date_gmt":"2026-07-20T10:11:42","guid":{"rendered":"https:\/\/ic-vendor.com\/cdcm61004rhbr\/"},"modified":"2026-07-20T10:11:42","modified_gmt":"2026-07-20T10:11:42","slug":"cdcm61004rhbr","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/cdcm61004rhbr\/","title":{"rendered":"CDCM61004RHBR"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

The CDCM61004RHBR is a 1:4 ultra-low jitter crystal-input clock generator from Texas Instruments, packaged in a 32-pin VQFN (RHB) 5 \u00d7 5 mm package. It integrates a PLL with an internal VCO ranging from 1.75 GHz to 2.05 GHz and provides four universal output pairs, each independently configurable as LVPECL, LVDS, or 2-LVCMOS. The device achieves 0.509 ps RMS typical jitter (10 kHz to 20 MHz) and supports output frequencies from 43.75 MHz to 683.264 MHz.<\/p>\n

\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n\n
\u0627\u0644\u0648\u0638\u064a\u0641\u0629<\/td>\n1:4 Low-Jitter Clock Generator<\/td>\n<\/tr>\n
\u0627\u0644\u0645\u062f\u062e\u0644\u0627\u062a<\/td>\nCrystal or LVCMOS (21.875-28.47 MHz)<\/td>\n<\/tr>\n
VCO Range<\/td>\n1.75 GHz to 2.05 GHz<\/td>\n<\/tr>\n
Output Frequency<\/td>\n43.75 MHz to 683.264 MHz<\/td>\n<\/tr>\n
Outputs<\/td>\n4 universal (LVPECL, LVDS, or 2\u00d7LVCMOS each)<\/td>\n<\/tr>\n
Jitter<\/td>\n0.509 ps RMS typical (10 kHz-20 MHz)<\/td>\n<\/tr>\n
Phase Noise<\/td>\n-146 dBc\/Hz at 5 MHz offset (625 MHz LVPECL)<\/td>\n<\/tr>\n
Output Skew<\/td>\n30 ps (LVPECL)<\/td>\n<\/tr>\n
Supply<\/td>\n3.3V<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nVQFN-32 (5 \u00d7 5 mm)<\/td>\n<\/tr>\n
\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n-40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<\/table>\n

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    \n
  • Ultra-low jitter: 0.509 ps RMS typical, sub-1 ps guaranteed<\/li>\n
  • Four universal output pairs \u2014 each independently configurable as LVPECL, LVDS, or 2-LVCMOS<\/li>\n
  • Integrated VCO from 1.75 GHz to 2.05 GHz with 7 output dividers (1\/2\/3\/4\/6\/8)<\/li>\n
  • Crystal or LVCMOS reference input with internal PLL<\/li>\n
  • Excellent phase noise: -146 dBc\/Hz at 5 MHz offset<\/li>\n
  • Pin-selectable output format and divider ratios<\/li>\n<\/ul>\n

    \u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
      \n
    • SONET and Ethernet clock generation<\/li>\n
    • Fibre Channel and SAN timing<\/li>\n
    • Optical module reference clock distribution<\/li>\n
    • Wireless infrastructure base station timing<\/li>\n
    • Data converter clocking in high-speed DAQ<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The CDCM61004RHBR is a 1:4 ultra-low jitter crystal-input clock generator from Texas Instruments, packaged in a 32-pin VQFN (RHB) 5 \u00d7 5 mm package. It integrates a PLL with an internal VCO ranging from 1.75 GHz to 2.05 GHz and provides four universal output pairs, each independently configurable as LVPECL, LVDS, or 2-LVCMOS. […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[2034],"chip_brand":[138],"class_list":["post-10693","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","tag-cdcm61004rhbr","chip_brand-ti"],"acf":{"brief_explanation":"1:4 ultra-low jitter clock generator, 0.509ps, LVPECL\/LVDS\/LVCMOS outputs, VQFN-32","date_code":"","package_case":"VQFN-32 (5.0 \u00d7 5.0 \u00d7 0.9 mm, 0.5mm pitch)","in_stock":8238,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cdcm61004.pdf","price":"$5.90 @ 1ku","product_introduction":"The CDCM61004 is a high-performance clock generator that integrates a PLL with an internal VCO and four universal output drivers. It accepts a crystal or LVCMOS reference input in the 21.875 to 28.47 MHz range, multiplies it up to the VCO frequency (1.75 to 2.05 GHz), and divides it down to produce four independent clock outputs ranging from 43.75 MHz to 683.264 MHz. Each output pair can be independently configured as LVPECL, LVDS, or dual LVCMOS through pin strapping. The device achieves industry-leading jitter performance of 0.509 ps RMS typical (10 kHz to 20 MHz integration bandwidth), making it suitable for the most demanding timing applications in communications and data conversion.","working_principle":"The CDCM61004 uses a PLL-based frequency synthesis architecture. The external crystal (or LVCMOS reference) feeds a crystal oscillator circuit that generates the reference clock for the phase-frequency detector (PFD). The PFD compares the divided VCO feedback signal with the reference and drives the charge pump, which in turn controls the VCO through the loop filter. The VCO operates from 1.75 to 2.05 GHz, and the output dividers (\/1, \/2, \/3, \/4, \/6, \/8) reduce the VCO frequency to the desired output frequencies. Each of the four output drivers is independently configurable through hardware control pins to operate in LVPECL, LVDS, or dual-LVCMOS mode. The low-jitter performance is achieved through careful VCO design, optimized charge pump linearity, and low-noise output driver circuits.","pin_description":"
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>
      1<\/td>XTAL_IN<\/td>Input<\/td>Crystal input or LVCMOS clock<\/td><\/tr>
      2<\/td>XTAL_OUT<\/td>Output<\/td>Crystal output<\/td><\/tr>
      3<\/td>VDD_DIG<\/td>Power<\/td>3.3V digital supply<\/td><\/tr>
      4<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>
      5-6<\/td>OUT0_N\/OUT0_P<\/td>Output<\/td>Output 0 differential pair<\/td><\/tr>
      7-8<\/td>OUT1_N\/OUT1_P<\/td>Output<\/td>Output 1 differential pair<\/td><\/tr>
      9-10<\/td>OUT2_N\/OUT2_P<\/td>Output<\/td>Output 2 differential pair<\/td><\/tr>
      11-12<\/td>OUT3_N\/OUT3_P<\/td>Output<\/td>Output 3 differential pair<\/td><\/tr>
      13-16<\/td>CTRL0-CTRL3<\/td>Input<\/td>Output format select (LVPECL\/LVDS\/LVCMOS)<\/td><\/tr>
      17-19<\/td>DIV0-DIV2<\/td>Input<\/td>Output divider select pins<\/td><\/tr>
      20-22<\/td>S0-S2<\/td>Input<\/td>VCO and PLL configuration straps<\/td><\/tr>
      23<\/td>PD<\/td>Input<\/td>Power down (active high)<\/td><\/tr>
      24-32<\/td>VDD\/GND\/NC<\/td>Power\/\u2014<\/td>Power, ground, no-connect<\/td><\/tr>
      EP<\/td>Thermal Pad<\/td>Power<\/td>Exposed pad \u2014 connect to GND plane<\/td><\/tr><\/table>","application_scenarios":"
      • 10GbE\/40GbE Ethernet PHY reference clock generation with sub-ps jitter<\/li>
      • Fibre Channel 4G\/8G\/16G reference clock distribution in SAN switches<\/li>
      • High-speed ADC\/DAC sample clock generation in software-defined radio<\/li>
      • Optical transceiver module reference clock with multiple output formats<\/li>
      • Wireless base station CPRI\/OBSAI timing clock distribution<\/li><\/ul>","alternative_models":"
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>
        TI<\/td>CDCE62002RHBR<\/td>VQFN-32<\/td>Dual-VCO, jitter cleaner, SPI control<\/td><\/tr>
        TI<\/td>LMK04828<\/td>VQFN-64<\/td>14-output, dual-PLL, JESD204B<\/td><\/tr>
        Renesas<\/td>8V49N242<\/td>QFN-48<\/td>4-output, fractional-N, jitter cleaner<\/td><\/tr>
        Silicon Labs<\/td>SI5341A<\/td>QFN-44<\/td>4-output, Any-Frequency, sub-100fs<\/td><\/tr>
        Microchip<\/td>ZL30263<\/td>QFN-64<\/td>8-output, Synchronous Ethernet<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10693","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=10693"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10693\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=10693"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=10693"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=10693"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=10693"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}