{"id":10695,"date":"2026-07-20T10:11:46","date_gmt":"2026-07-20T10:11:46","guid":{"rendered":"https:\/\/ic-vendor.com\/cdce62002rhbr\/"},"modified":"2026-07-20T10:11:46","modified_gmt":"2026-07-20T10:11:46","slug":"cdce62002rhbr","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/cdce62002rhbr\/","title":{"rendered":"CDCE62002RHBR"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

The CDCE62002RHBR is a four-output clock generator and jitter cleaner from Texas Instruments with integrated dual VCOs, packaged in a 32-pin VQFN (RHB) 5 \u00d7 5 mm package. It features a unique dual-VCO architecture spanning 1.750 GHz to 2.356 GHz, supporting output frequencies from 10.94 MHz to 1.175 GHz. The device achieves sub-0.5 ps RMS jitter performance and is configurable via SPI interface with integrated EEPROM for power-up configuration.<\/p>\n

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\u0627\u0644\u0648\u0638\u064a\u0641\u0629<\/td>\n4-Output Clock Generator \/ Jitter Cleaner<\/td>\n<\/tr>\n
VCO Range<\/td>\n1.750 GHz to 2.356 GHz (dual VCO)<\/td>\n<\/tr>\n
Input Frequency<\/td>\n1-500 MHz (diff), 2-42 MHz (xtal\/aux)<\/td>\n<\/tr>\n
Output Frequency<\/td>\n10.94 MHz to 1.175 GHz<\/td>\n<\/tr>\n
Outputs<\/td>\n2 differential or 4 single-ended (LVPECL\/LVDS\/LVCMOS)<\/td>\n<\/tr>\n
Jitter<\/td>\n< 0.5 ps RMS (10 kHz-20 MHz)<\/td>\n<\/tr>\n
Phase Noise<\/td>\n-130 dBc\/Hz at 1 MHz offset (Fc=491.52 MHz)<\/td>\n<\/tr>\n
\u0627\u0644\u0648\u0627\u062c\u0647\u0629<\/td>\nSPI (serial)<\/td>\n<\/tr>\n
Supply<\/td>\n3.3V<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nVQFN-32 (5 \u00d7 5 mm)<\/td>\n<\/tr>\n
\u062f\u0631\u062c\u0629 \u062d\u0631\u0627\u0631\u0629 \u0627\u0644\u062a\u0634\u063a\u064a\u0644<\/td>\n-40 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629 \u0625\u0644\u0649 +85 \u062f\u0631\u062c\u0629 \u0645\u0626\u0648\u064a\u0629<\/td>\n<\/tr>\n<\/table>\n

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    \n
  • Dual-VCO architecture covers 1.750 to 2.356 GHz for wide frequency range<\/li>\n
  • Sub-0.5 ps RMS jitter performance in both generator and cleaner modes<\/li>\n
  • Smart input multiplexer with automatic switching between two references<\/li>\n
  • Integrated EEPROM for power-up configuration without SPI access<\/li>\n
  • Partially integrated loop filter reduces external component count<\/li>\n
  • Supports clock generation, jitter cleaning, and holdover modes<\/li>\n<\/ul>\n

    \u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
      \n
    • Data converter clocking in wireless infrastructure<\/li>\n
    • Optical transport network (OTN) timing and synchronization<\/li>\n
    • Medical imaging (MRI\/CT) system clock generation<\/li>\n
    • Jitter cleaning for SERDES reference clocks<\/li>\n
    • Test and measurement equipment timing<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The CDCE62002RHBR is a four-output clock generator and jitter cleaner from Texas Instruments with integrated dual VCOs, packaged in a 32-pin VQFN (RHB) 5 \u00d7 5 mm package. It features a unique dual-VCO architecture spanning 1.750 GHz to 2.356 GHz, supporting output frequencies from 10.94 MHz to 1.175 GHz. The device achieves sub-0.5 […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[2036],"chip_brand":[138],"class_list":["post-10695","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","tag-cdce62002rhbr","chip_brand-ti"],"acf":{"brief_explanation":"4-output clock generator\/jitter cleaner, dual-VCO, <0.5ps jitter, SPI, VQFN-32","date_code":"","package_case":"VQFN-32 (5.0 \u00d7 5.0 \u00d7 0.9 mm, 0.5mm pitch)","in_stock":11821,"datasheet":"https:\/\/www.ti.com\/lit\/ds\/symlink\/cdce62002.pdf","price":"$8.50 @ 1ku","product_introduction":"The CDCE62002 is a highly versatile clock generator and jitter cleaner that integrates dual VCOs, a fractional-N PLL, and four universal output drivers in a single 5 \u00d7 5 mm VQFN package. The unique dual-VCO architecture provides a continuous tuning range from 1.750 GHz to 2.356 GHz without VCO band gaps, enabling flexible frequency planning. The device can operate in multiple modes: as a frequency synthesizer generating clocks from a crystal reference, as a jitter cleaner filtering a noisy reference input, and in SERDES start-up mode. The smart input multiplexer automatically switches between two reference inputs, and the integrated EEPROM stores the configuration for autonomous power-up without SPI intervention.","working_principle":"The CDCE62002 operates as a PLL-based frequency synthesizer with jitter cleaning capability. One of two reference inputs (differential or crystal) feeds the input divider and phase-frequency detector. The dual-VCO architecture extends the VCO tuning range by combining two overlapping VCO bands, each with its own calibration circuit. The PLL feedback path includes programmable dividers that set the output-to-input frequency ratio. The partially integrated loop filter reduces the number of external components while still allowing loop bandwidth optimization for jitter cleaning. In jitter cleaner mode, a narrow loop bandwidth filters the reference input phase noise, while the VCO provides a clean output. In generator mode, a wider loop bandwidth follows the reference more closely. The SPI interface provides runtime configuration, while the EEPROM ensures the device starts up with the last programmed settings.","pin_description":"
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>
      1<\/td>REF_SEL<\/td>Input<\/td>Reference select \u2014 0=REF0, 1=REF1<\/td><\/tr>
      2<\/td>SDA\/MOSI<\/td>I\/O<\/td>SPI data input<\/td><\/tr>
      3<\/td>SCL\/SCLK<\/td>Input<\/td>SPI clock input<\/td><\/tr>
      4<\/td>CS_N<\/td>Input<\/td>SPI chip select (active low)<\/td><\/tr>
      5-6<\/td>REF0_N\/REF0_P<\/td>Input<\/td>Reference input 0 differential pair<\/td><\/tr>
      7-8<\/td>REF1_N\/REF1_P<\/td>Input<\/td>Reference input 1 \/ crystal<\/td><\/tr>
      9-10<\/td>XTAL_IN\/XTAL_OUT<\/td>I\/O<\/td>Crystal oscillator connections<\/td><\/tr>
      11-12<\/td>OUT0_N\/OUT0_P<\/td>Output<\/td>Output 0 differential pair<\/td><\/tr>
      13-14<\/td>OUT1_N\/OUT1_P<\/td>Output<\/td>Output 1 differential pair<\/td><\/tr>
      15-16<\/td>OUT2_N\/OUT2_P<\/td>Output<\/td>Output 2 (or LVCMOS pair)<\/td><\/tr>
      17-18<\/td>OUT3_N\/OUT3_P<\/td>Output<\/td>Output 3 (or LVCMOS pair)<\/td><\/tr>
      19-22<\/td>VDD\/GND<\/td>Power<\/td>3.3V supply and ground<\/td><\/tr>
      23-32<\/td>VDD\/GND\/NC\/LD<\/td>Power\/\u2014\/Output<\/td>Power, ground, no-connect, lock detect<\/td><\/tr>
      EP<\/td>Thermal Pad<\/td>Power<\/td>Exposed pad \u2014 connect to GND<\/td><\/tr><\/table>","application_scenarios":"
      • Wireless base station RF ADC\/DAC sample clock with sub-ps jitter<\/li>
      • OTN line card timing with automatic reference switchover and holdover<\/li>
      • Medical ultrasound beamforming clock distribution with jitter cleaning<\/li>
      • 100GbE PHY reference clock generation with fractional-N synthesis<\/li>
      • Test equipment reference clock generation with EEPROM power-up config<\/li><\/ul>","alternative_models":"
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>
        TI<\/td>CDCM61004RHBR<\/td>VQFN-32<\/td>1:4 clock generator, no jitter cleaner<\/td><\/tr>
        TI<\/td>LMK04828<\/td>WQFN-64<\/td>14-output, dual-PLL, JESD204B<\/td><\/tr>
        Renesas<\/td>8T49N242<\/td>QFN-48<\/td>Fractional-N, 4-output, jitter attenuator<\/td><\/tr>
        Silicon Labs<\/td>SI5341A<\/td>QFN-44<\/td>4-output, sub-100fs, Any-Frequency<\/td><\/tr>
        Microchip<\/td>ZL30263<\/td>QFN-64<\/td>8-output SyncE clock<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10695","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=10695"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/10695\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=10695"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=10695"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=10695"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=10695"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}