{"id":11663,"date":"2026-07-26T14:03:16","date_gmt":"2026-07-26T14:03:16","guid":{"rendered":"https:\/\/ic-vendor.com\/mc74lcx573dtr2\/"},"modified":"2026-07-26T14:03:16","modified_gmt":"2026-07-26T14:03:16","slug":"mc74lcx573dtr2","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/mc74lcx573dtr2\/","title":{"rendered":"MC74LCX573DTR2"},"content":{"rendered":"

\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n

The MC74LCX573DTR2 from onsemi is an octal D-type transparent latch with 3.3V operation and 5V-tolerant inputs. It is designed for 3.3V to 5V bus interfacing in mixed-voltage systems, providing 8-bit data latching with output enable for bus-oriented applications.<\/p>\n

\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n\n\n\n\n\n\n\n
\u0627\u0644\u0648\u0638\u064a\u0641\u0629<\/td>\nOctal D-type transparent latch<\/td>\n<\/tr>\n
\u062c\u0647\u062f \u0627\u0644\u0625\u0645\u062f\u0627\u062f<\/td>\n2.0V to 3.6V<\/td>\n<\/tr>\n
\u062a\u0623\u062e\u064a\u0631 \u0627\u0644\u0627\u0646\u062a\u0634\u0627\u0631<\/td>\n4.5 ns at 3.3V<\/td>\n<\/tr>\n
Output Drive<\/td>\n\u00b1 24 \u0645\u0644\u0644\u064a \u0623\u0645\u0628\u064a\u0631<\/td>\n<\/tr>\n
Input Tolerant<\/td>\n5V<\/td>\n<\/tr>\n
\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\nTSSOP-20 (6.5×4.4mm)<\/td>\n<\/tr>\n<\/table>\n

\u0645\u0628\u062f\u0623 \u0627\u0644\u0639\u0645\u0644<\/h2>\n

When latch enable (LE) is HIGH, Q outputs follow D inputs (transparent mode). When LE goes LOW, outputs hold the last data. Output enable (OE) tri-states all outputs for bus sharing. 5V-tolerant inputs allow the latch to receive 5V logic signals while operating from a 3.3V supply.<\/p>\n

\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n
    \n
  • Processor I\/O port expansion<\/li>\n
  • Address\/data latch<\/li>\n
  • Bus buffering with 5V interface<\/li>\n
  • Peripheral register hold<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

    Product Overview The MC74LCX573DTR2 from onsemi is an octal D-type transparent latch with 3.3V operation and 5V-tolerant inputs. It is designed for 3.3V to 5V bus interfacing in mixed-voltage systems, providing 8-bit data latching with output enable for bus-oriented applications. Key Specifications Function Octal D-type transparent latch Supply Voltage 2.0V to 3.6V Propagation Delay 4.5 […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13],"tags":[2942],"chip_brand":[182],"class_list":["post-11663","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","tag-mc74lcx573dtr2","chip_brand-onsemi"],"acf":{"brief_explanation":"Octal D-type latch, 3.3V, 5V-tolerant, TSSOP-20","date_code":"","package_case":"TSSOP-20","in_stock":5296,"datasheet":"https:\/\/www.onsemi.com\/products\/logic\/flip-flops-latches\/MC74LCX573DTR2","price":"","product_introduction":"The MC74LCX573DTR2 from onsemi is an octal D-type transparent latch with 3.3V operation and 5V-tolerant inputs. It is designed for 3.3V to 5V bus interfacing in mixed-voltage systems, providing 8-bit data latching with output enable for bus-oriented applications.","working_principle":"When latch enable (LE) is HIGH, Q outputs follow D inputs (transparent mode). When LE goes LOW, outputs hold the last data. Output enable (OE) tri-states all outputs for bus sharing. 5V-tolerant inputs allow the latch to receive 5V logic signals while operating from a 3.3V supply.","pin_description":"
    Pin<\/th>Name<\/th>Description<\/th><\/tr>
    1<\/td>OE<\/td>Output enable (active low)<\/td><\/tr>
    2-9<\/td>D0-D7<\/td>Data inputs<\/td><\/tr>
    10<\/td>GND<\/td>Ground<\/td><\/tr>
    11-18<\/td>Q0-Q7<\/td>Latched outputs<\/td><\/tr>
    19<\/td>LE<\/td>Latch enable<\/td><\/tr>
    20<\/td>VCC<\/td>Supply<\/td><\/tr><\/table>","application_scenarios":"
    • Processor I\/O port expansion<\/li>
    • Address\/data latch<\/li>
    • Bus buffering with 5V interface<\/li>
    • Peripheral register hold<\/li><\/ul>","alternative_models":"
      Model<\/th>Manufacturer<\/th>Key Difference<\/th><\/tr>
      74LVC573<\/td>Nexperia<\/td>Equivalent<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/11663","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=11663"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/11663\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=11663"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=11663"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=11663"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=11663"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}