{"id":11986,"date":"2026-07-27T09:29:23","date_gmt":"2026-07-27T09:29:23","guid":{"rendered":"https:\/\/ic-vendor.com\/epm1270t144c5n\/"},"modified":"2026-07-27T10:13:48","modified_gmt":"2026-07-27T10:13:48","slug":"epm1270t144c5n","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/ar\/epm1270t144c5n\/","title":{"rendered":"EPM1270T144C5N"},"content":{"rendered":"<h2>\u0646\u0638\u0631\u0629 \u0639\u0627\u0645\u0629 \u0639\u0644\u0649 \u0627\u0644\u0645\u0646\u062a\u062c<\/h2>\n<p>EPM1270T144C5N is an Intel\/Altera MAX II EPM1270 CPLD, 1,270 macrocells, 144-pin TQFP, commercial grade.<\/p>\n<h2>\u0627\u0644\u0645\u0648\u0627\u0635\u0641\u0627\u062a \u0627\u0644\u0631\u0626\u064a\u0633\u064a\u0629<\/h2>\n<table>\n<tr>\n<td>\u0627\u0644\u0646\u0648\u0639<\/td>\n<td>MAX II CPLD<\/td>\n<\/tr>\n<tr>\n<td>Macrocells<\/td>\n<td>1,270<\/td>\n<\/tr>\n<tr>\n<td>UFM<\/td>\n<td>8,192 bits user flash<\/td>\n<\/tr>\n<tr>\n<td>\u0627\u0644\u062d\u0632\u0645\u0629<\/td>\n<td>144-pin TQFP (T144)<\/td>\n<\/tr>\n<tr>\n<td>Speed Grade<\/td>\n<td>C5<\/td>\n<\/tr>\n<tr>\n<td>Series<\/td>\n<td>EPM1270<\/td>\n<\/tr>\n<\/table>\n<h2>\u0627\u0644\u0645\u064a\u0632\u0627\u062a<\/h2>\n<ul>\n<li>1,270 macrocell MAX II CPLD<\/li>\n<li>8K bits user flash memory (UFM)<\/li>\n<li>In-system programmable<\/li>\n<li>144-pin TQFP package<\/li>\n<\/ul>\n<h2>\u0627\u0644\u062a\u0637\u0628\u064a\u0642\u0627\u062a<\/h2>\n<p>Refer to manufacturer datasheet for detailed application information and design guidelines.<\/p>","protected":false},"excerpt":{"rendered":"<p>Product Overview EPM1270T144C5N is an Intel\/Altera MAX II EPM1270 CPLD, 1,270 macrocells, 144-pin TQFP, commercial grade. Key Specifications Type MAX II CPLD Macrocells 1,270 UFM 8,192 bits user flash Package 144-pin TQFP (T144) Speed Grade C5 Series EPM1270 Features 1,270 macrocell MAX II CPLD 8K bits user flash memory (UFM) In-system programmable 144-pin TQFP package [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[21,13],"tags":[3280],"chip_brand":[2865],"class_list":["post-11986","post","type-post","status-publish","format-standard","hentry","category-audio-ics","category-integrated-circuits-ics","tag-epm1270t144c5n","chip_brand-intel-altera"],"acf":{"brief_explanation":"MAX II CPLD, 1,270 macrocells, 8Kbit UFM, instant-on flash, 1.8V\/2.5V\/3.3V I\/O","date_code":"C5","package_case":"144-pin TQFP","in_stock":2687,"datasheet":"https:\/\/www.intel.com\/content\/dam\/www\/programmable\/us\/en\/pdfs\/literature\/hb\/max2\/mx2-hb.pdf","price":"$1.20 - $12.00","product_introduction":"EPM1270T144C5N is an Intel\/Altera MAX II EPM1270 CPLD, 1,270 macrocells, 144-pin TQFP, commercial grade.","working_principle":"The EPM1270T144C5N is a MAX II CPLD from Intel\/Altera. It uses a macrocell-based architecture with programmable AND\/OR logic arrays and flip-flops. The Macrocells are grouped into Logic Array Blocks (LABs) interconnected by a programmable routing matrix. User Flash Memory (UFM) provides non-volatile storage. Configuration is instant-on from on-chip flash, enabling the device to be operational immediately after power-up without external configuration. I\/O elements support multiple standards and feature programmable drive strength and slew rate.","pin_description":"<table><tr><th>Pin Group<\/th><th>Name<\/th><th>Description<\/th><\/tr><tr><td>I\/O<\/td><td>GPIO<\/td><td>Programmable I\/O with multiple drive strength settings<\/td><\/tr><tr><td>Power<\/td><td>VCC, VCCIO<\/td><td>Core and I\/O supply (1.8V\/2.5V\/3.3V)<\/td><\/tr><tr><td>Ground<\/td><td>GND<\/td><td>Ground reference<\/td><\/tr><tr><td>JTAG<\/td><td>TDI, TDO, TMS, TCK<\/td><td>IEEE 1149.1 JTAG boundary scan and ISP<\/td><\/tr><tr><td>Clock<\/td><td>CLK<\/td><td>Global clock input<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Address decoding and glue logic<\/li><li>Power-on reset and sequencing control<\/li><li>I2C\/SPI bus bridging<\/li><li>State machine implementation<\/li><li>Board-level interface adaptation<\/li><\/ul>","alternative_models":"<table><tr><th>Model<\/th><th>Manufacturer<\/th><th>Key Difference<\/th><\/tr><tr><td>XC2C128<\/td><td>Xilinx<\/td><td>CoolRunner-II, 128 macrocell, ultra-low power<\/td><\/tr><tr><td>MACHXO2<\/td><td>Lattice<\/td><td>6K LUT CPLD with embedded flash<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/11986","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/comments?post=11986"}],"version-history":[{"count":1,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/11986\/revisions"}],"predecessor-version":[{"id":12022,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/posts\/11986\/revisions\/12022"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/media?parent=11986"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/categories?post=11986"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/tags?post=11986"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/ar\/wp-json\/wp\/v2\/chip_brand?post=11986"}],"curies":[{"name":"\u062f\u0628\u0644\u064a\u0648 \u0628\u064a","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}