{"id":10460,"date":"2026-07-20T04:09:33","date_gmt":"2026-07-20T04:09:33","guid":{"rendered":"https:\/\/ic-vendor.com\/74hc132d-3\/"},"modified":"2026-07-20T04:09:33","modified_gmt":"2026-07-20T04:09:33","slug":"74hc132d-3","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/es\/74hc132d-3\/","title":{"rendered":"74HC132D"},"content":{"rendered":"

Productos<\/h2>\n

The Nexperia 74HC132D is a quad 2-input NAND gate with Schmitt-trigger inputs, housed in an SO14 package. It transforms slowly changing input signals into sharply defined, jitter-free output signals, making it ideal for noisy environments and waveform shaping applications.<\/p>\n

Especificaciones<\/h2>\n\n\n\n\n\n\n\n\n\n\n
Supply Voltage (VCC)<\/td>\n2.0 V to 6.0 V<\/td>\n<\/tr>\n
Logic Family<\/td>\n74HC (CMOS)<\/td>\n<\/tr>\n
Propagation Delay (tpd)<\/td>\n11 ns<\/td>\n<\/tr>\n
Max Frequency<\/td>\n36 MHz<\/td>\n<\/tr>\n
Output Drive<\/td>\n\u00b15.2 mA<\/td>\n<\/tr>\n
Number of Gates<\/td>\n4 (Quad)<\/td>\n<\/tr>\n
Input Type<\/td>\nSchmitt Trigger<\/td>\n<\/tr>\n
Temperatura de funcionamiento<\/td>\n-40\u00b0C to +125\u00b0C<\/td>\n<\/tr>\n
ESD Protection<\/td>\nHBM >2000V, CDM >1000V<\/td>\n<\/tr>\n<\/table>\n

Caracter\u00edsticas<\/h2>\n
    \n
  • Wide supply voltage range from 2.0 V to 6.0 V<\/li>\n
  • CMOS low power dissipation with high noise immunity<\/li>\n
  • Unlimited input rise and fall times due to Schmitt-trigger action<\/li>\n
  • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B<\/li>\n
  • Input clamp diodes for interfacing to voltages in excess of VCC<\/li>\n
  • Complies with JEDEC standards JESD8C and JESD7A<\/li>\n<\/ul>\n

    Aplicaciones<\/h2>\n
      \n
    • Wave and pulse shapers<\/li>\n
    • Astable multivibrators<\/li>\n
    • Monostable multivibrators<\/li>\n
    • Noise immunity signal conditioning<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The Nexperia 74HC132D is a quad 2-input NAND gate with Schmitt-trigger inputs, housed in an SO14 package. It transforms slowly changing input signals into sharply defined, jitter-free output signals, making it ideal for noisy environments and waveform shaping applications. Key Specifications Supply Voltage (VCC) 2.0 V to 6.0 V Logic Family 74HC (CMOS) […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13],"tags":[1766],"chip_brand":[168],"class_list":["post-10460","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","tag-74hc132d","chip_brand-nxp"],"acf":{"brief_explanation":"Quad 2-input NAND gate with Schmitt-trigger inputs, 2.0-6.0V, SO14, 11ns tpd, CMOS logic","date_code":"","package_case":"SO14 (SOT108-1) 8.65 x 3.9 x 1.75 mm","in_stock":8742,"datasheet":"https:\/\/assets.nexperia.com\/documents\/data-sheet\/74HC_HCT132.pdf","price":"$0.15 @ 1ku","product_introduction":"The Nexperia 74HC132D is a quad 2-input NAND gate integrated circuit featuring Schmitt-trigger inputs. Manufactured using advanced CMOS technology, it operates over a wide supply voltage range of 2.0 V to 6.0 V. The Schmitt-trigger inputs transform slowly changing input signals into sharply defined, jitter-free output signals, enabling unlimited input rise and fall times. The device includes input clamp diodes that allow the use of current limiting resistors to interface inputs to voltages in excess of VCC. It is fully specified from -40\u00b0C to +125\u00b0C and complies with JEDEC standards JESD8C and JESD7A. The device offers ESD protection exceeding 2000V HBM and 1000V CDM, along with latch-up performance exceeding 100 mA.","working_principle":"The 74HC132D contains four independent 2-input NAND gates with Schmitt-trigger input stages. Each gate performs the Boolean function Y = NOT (A AND B). The Schmitt-trigger action uses two distinct threshold voltages \u2014 a positive-going threshold (VT+) and a negative-going threshold (VT\u2212) \u2014 creating a hysteresis loop. This hysteresis eliminates the effects of input noise and slow transition edges, producing clean, sharp output transitions. When both inputs A and B are HIGH, the output goes LOW; in all other input combinations, the output remains HIGH. The CMOS input stage ensures low power dissipation, while the output buffer provides \u00b15.2 mA drive capability.","pin_description":"\n
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>\n
      1<\/td>1A<\/td>Input<\/td>Data input for Gate 1<\/td><\/tr>\n
      2<\/td>1B<\/td>Input<\/td>Data input for Gate 1<\/td><\/tr>\n
      3<\/td>1Y<\/td>Output<\/td>NAND output for Gate 1<\/td><\/tr>\n
      4<\/td>2A<\/td>Input<\/td>Data input for Gate 2<\/td><\/tr>\n
      5<\/td>2B<\/td>Input<\/td>Data input for Gate 2<\/td><\/tr>\n
      6<\/td>2Y<\/td>Output<\/td>NAND output for Gate 2<\/td><\/tr>\n
      7<\/td>GND<\/td>Power<\/td>Ground (0 V)<\/td><\/tr>\n
      8<\/td>3Y<\/td>Output<\/td>NAND output for Gate 3<\/td><\/tr>\n
      9<\/td>3A<\/td>Input<\/td>Data input for Gate 3<\/td><\/tr>\n
      10<\/td>3B<\/td>Input<\/td>Data input for Gate 3<\/td><\/tr>\n
      11<\/td>4Y<\/td>Output<\/td>NAND output for Gate 4<\/td><\/tr>\n
      12<\/td>4A<\/td>Input<\/td>Data input for Gate 4<\/td><\/tr>\n
      13<\/td>4B<\/td>Input<\/td>Data input for Gate 4<\/td><\/tr>\n
      14<\/td>VCC<\/td>Power<\/td>Supply voltage<\/td><\/tr>\n<\/table>","application_scenarios":"
        \n
      • Wave and pulse shapers for noisy signal environments<\/li>\n
      • Astable multivibrators for clock generation<\/li>\n
      • Monostable multivibrators for timing circuits<\/li>\n
      • Signal conditioning in industrial control systems<\/li>\n
      • Debouncing circuits for mechanical switches<\/li>\n<\/ul>","alternative_models":"\n
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>\n
        Texas Instruments<\/td>SN74HC132D<\/td>SOIC-14<\/td>Pin-to-pin compatible<\/td><\/tr>\n
        onsemi<\/td>MC74HC132ADR2G<\/td>SOIC-14<\/td>Pin-to-pin compatible<\/td><\/tr>\n
        Toshiba<\/td>TC74HC132AP<\/td>DIP-14<\/td>Equivalent function<\/td><\/tr>\n
        STMicroelectronics<\/td>M74HC132RM13TR<\/td>SO-14<\/td>Pin-to-pin compatible<\/td><\/tr>\n
        Nexperia<\/td>74HCT132D<\/td>SO14<\/td>TTL input level variant<\/td><\/tr>\n<\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts\/10460","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/comments?post=10460"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts\/10460\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/media?parent=10460"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/categories?post=10460"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/tags?post=10460"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/chip_brand?post=10460"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}