{"id":11620,"date":"2026-07-26T12:51:56","date_gmt":"2026-07-26T12:51:56","guid":{"rendered":"https:\/\/ic-vendor.com\/mx25l4006em1i-12g\/"},"modified":"2026-07-26T12:51:56","modified_gmt":"2026-07-26T12:51:56","slug":"mx25l4006em1i-12g","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/es\/mx25l4006em1i-12g\/","title":{"rendered":"MX25L4006EM1I-12G"},"content":{"rendered":"<h2>Productos<\/h2>\n<p>The MX25L4006EM1I-12G is a Macronix 4Mbit serial NOR flash with standard\/dual\/quad SPI interface. 120MHz clock in quad mode for 60MB\/s read throughput. 4KB\/32KB\/64KB erase granularity. 100K cycle endurance per sector. 2.7V-3.6V supply. SOP-8 industrial package.<\/p>\n<h2>Especificaciones<\/h2>\n<table>\n<tr>\n<td>Tipo<\/td>\n<td>4Mbit Serial NOR Flash<\/td>\n<\/tr>\n<tr>\n<td>Densidad<\/td>\n<td>4 Mbit (512K x 8)<\/td>\n<\/tr>\n<tr>\n<td>Interface<\/td>\n<td>SPI (Standard\/Dual\/Quad)<\/td>\n<\/tr>\n<tr>\n<td>Clock Frequency<\/td>\n<td>120 MHz (Quad)<\/td>\n<\/tr>\n<tr>\n<td>Erase Sectors<\/td>\n<td>4KB, 32KB, 64KB, Full chip<\/td>\n<\/tr>\n<tr>\n<td>Endurance<\/td>\n<td>100K cycle\/sector<\/td>\n<\/tr>\n<tr>\n<td>Data Retention<\/td>\n<td>20 years<\/td>\n<\/tr>\n<tr>\n<td>Tensi\u00f3n de alimentaci\u00f3n<\/td>\n<td>2,7 V a 3,6 V<\/td>\n<\/tr>\n<tr>\n<td>Temperatura de funcionamiento<\/td>\n<td>-40 to +85C (Industrial)<\/td>\n<\/tr>\n<tr>\n<td>Paquete<\/td>\n<td>SOP-8 (150mil)<\/td>\n<\/tr>\n<\/table>\n<h2>Principio de funcionamiento<\/h2>\n<p>The MX25L4006E uses a NOR flash memory array accessed through a serial SPI interface. In standard SPI mode, instructions, addresses, and data are transferred on a single data line (SI\/SO). Dual I\/O mode uses two data pins for 2x throughput. Quad I\/O mode uses four data pins (SI, SO, WP, HOLD) for 4x throughput at 120MHz clock (60MB\/s). The memory array supports non-uniform erase: 4KB sectors for fine granularity, 32KB and 64KB blocks for bulk erase, and full chip erase. Program operation writes 1-256 bytes per command. Status registers provide write protection and busy flags.<\/p>\n<h2>Aplicaciones<\/h2>\n<ul>\n<li>Boot code storage<\/li>\n<li>FPGA configuration<\/li>\n<li>Data logging<\/li>\n<li>Firmware storage<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"<p>Product Overview The MX25L4006EM1I-12G is a Macronix 4Mbit serial NOR flash with standard\/dual\/quad SPI interface. 120MHz clock in quad mode for 60MB\/s read throughput. 4KB\/32KB\/64KB erase granularity. 100K cycle endurance per sector. 2.7V-3.6V supply. SOP-8 industrial package. Key Specifications Type 4Mbit Serial NOR Flash Density 4 Mbit (512K x 8) Interface SPI (Standard\/Dual\/Quad) Clock Frequency [&hellip;]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13],"tags":[2896],"chip_brand":[164],"class_list":["post-11620","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","tag-mx25l4006em1i-12g","chip_brand-macronix"],"acf":{"brief_explanation":"MX25L4006EM1I-12G - Serial Flash (Nor)","date_code":"","package_case":"SOP-8 (150mil)","in_stock":4544,"datasheet":"https:\/\/www.macronix.com\/en\/products\/nor-flash\/Pages\/default.aspx","price":"$0.60 @ 1ku","product_introduction":"The MX25L4006EM1I-12G is a Macronix 4Mbit serial NOR flash with standard\/dual\/quad SPI interface. 120MHz clock in quad mode for 60MB\/s read throughput. 4KB\/32KB\/64KB erase granularity. 100K cycle endurance per sector. 2.7V-3.6V supply. SOP-8 industrial package.","working_principle":"The MX25L4006E uses a NOR flash memory array accessed through a serial SPI interface. In standard SPI mode, instructions, addresses, and data are transferred on a single data line (SI\/SO). Dual I\/O mode uses two data pins for 2x throughput. Quad I\/O mode uses four data pins (SI, SO, WP, HOLD) for 4x throughput at 120MHz clock (60MB\/s). The memory array supports non-uniform erase: 4KB sectors for fine granularity, 32KB and 64KB blocks for bulk erase, and full chip erase. Program operation writes 1-256 bytes per command. Status registers provide write protection and busy flags.","pin_description":"<table><tr><th>Pin<\/th><th>Name<\/th><th>Desc<\/th><\/tr><tr><td>1<\/td><td>CS<\/td><td>Chip select<\/td><\/tr><tr><td>2<\/td><td>SO\/IO1<\/td><td>Serial out<\/td><\/tr><tr><td>3<\/td><td>WP\/IO2<\/td><td>Write protect<\/td><\/tr><tr><td>4<\/td><td>GND<\/td><td>Ground<\/td><\/tr><tr><td>5<\/td><td>SI\/IO0<\/td><td>Serial in<\/td><\/tr><tr><td>6<\/td><td>SCLK<\/td><td>Clock<\/td><\/tr><tr><td>7<\/td><td>HOLD\/IO3<\/td><td>Hold<\/td><\/tr><tr><td>8<\/td><td>VCC<\/td><td>Supply<\/td><\/tr><\/table>","application_scenarios":"<ul><li>Boot code storage<\/li><li>FPGA configuration<\/li><li>Data logging<\/li><li>Firmware storage<\/li><\/ul>","alternative_models":"<table><tr><th>Model<\/th><th>Vendor<\/th><th>Diff<\/th><\/tr><tr><td>MX25L8006EM1I<\/td><td>Macronix<\/td><td>8Mbit<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts\/11620","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/comments?post=11620"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/posts\/11620\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/media?parent=11620"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/categories?post=11620"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/tags?post=11620"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/es\/wp-json\/wp\/v2\/chip_brand?post=11620"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}