{"id":6851,"date":"2026-06-22T01:38:20","date_gmt":"2026-06-22T01:38:20","guid":{"rendered":"https:\/\/ic-vendor.com\/74hc164d653-2\/"},"modified":"2026-06-22T01:38:20","modified_gmt":"2026-06-22T01:38:20","slug":"74hc164d653-2","status":"publish","type":"post","link":"https:\/\/ic-vendor.com\/zh\/74hc164d653-2\/","title":{"rendered":"74HC164D,653"},"content":{"rendered":"

\u4ea7\u54c1\u6982\u89c8<\/h2>\n

The 74HC164D,653 from Nexperia is an 8-bit serial-in, parallel-out shift register with gated data inputs and asynchronous master reset in an SOIC-14 package.<\/p>\n

\u4e3b\u8981\u89c4\u683c<\/h2>\n\n\n\n\n\n\n\n\n\n\n\n
\u7c7b\u578b<\/td>\n8-bit Serial-In \/ Parallel-Out Shift Register<\/td>\n<\/tr>\n
\u7535\u6e90\u7535\u538b<\/td>\n2.0 V to 6.0 V<\/td>\n<\/tr>\n
\u4f20\u64ad\u5ef6\u8fdf<\/td>\n12 ns (typical @ 6V)<\/td>\n<\/tr>\n
Max Clock Frequency<\/td>\n85 MHz (typical)<\/td>\n<\/tr>\n
Output Drive<\/td>\n+\/-5.2 mA<\/td>\n<\/tr>\n
Number of Bits<\/td>\n8<\/td>\n<\/tr>\n
Data Inputs<\/td>\n2 (DSA, DSB, gated AND)<\/td>\n<\/tr>\n
\u91cd\u7f6e<\/td>\nAsynchronous master reset (MR, active LOW)<\/td>\n<\/tr>\n
\u5305\u88c5<\/td>\nSOIC-14 (SO14, SOT108-1)<\/td>\n<\/tr>\n
\u5de5\u4f5c\u6e29\u5ea6<\/td>\n-40C to +125C<\/td>\n<\/tr>\n<\/table>\n

\u7279\u70b9<\/h2>\n
    \n
  • 8-bit serial-in \/ parallel-out shift register<\/li>\n
  • Two gated serial data inputs (DSA and DSB)<\/li>\n
  • Asynchronous master reset clears all outputs<\/li>\n
  • 2.0V to 6.0V wide supply voltage range<\/li>\n
  • 85 MHz maximum clock frequency<\/li>\n
  • ESD protection: HBM >2000V, CDM >1000V<\/li>\n
  • Input clamp diodes for overvoltage interfacing<\/li>\n<\/ul>\n

    \u5e94\u7528<\/h2>\n
      \n
    • LED display driving via serial data<\/li>\n
    • I\/O expansion for microcontrollers<\/li>\n
    • Serial-to-parallel data conversion<\/li>\n
    • Keypad scanning circuits<\/li>\n<\/ul>","protected":false},"excerpt":{"rendered":"

      Product Overview The 74HC164D,653 from Nexperia is an 8-bit serial-in, parallel-out shift register with gated data inputs and asynchronous master reset in an SOIC-14 package. Key Specifications Type 8-bit Serial-In \/ Parallel-Out Shift Register Supply Voltage 2.0 V to 6.0 V Propagation Delay 12 ns (typical @ 6V) Max Clock Frequency 85 MHz (typical) Output […]<\/p>\n","protected":false},"author":2,"featured_media":0,"comment_status":"open","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[13,20],"tags":[],"chip_brand":[140],"class_list":["post-6851","post","type-post","status-publish","format-standard","hentry","category-integrated-circuits-ics","category-interface-ics","chip_brand-nexperia"],"acf":{"brief_explanation":"8-bit Serial-In Parallel-Out Shift Register, 2-6V, 85MHz, SOIC-14","date_code":"","package_case":"SOIC-14 \/ SO14 (8.65 x 3.9 x 1.75 mm)","in_stock":34567,"datasheet":"https:\/\/assets.nexperia.com\/documents\/data-sheet\/74HC_HCT164.pdf","price":"$0.18 @ 1ku","product_introduction":"The 74HC164D,653 from Nexperia is an 8-bit serial-in, parallel-out shift register in an SOIC-14 surface mount package. The device features two serial data inputs (DSA and DSB) that are ANDed together, allowing either input to serve as an active-HIGH enable for the other. Data is shifted into the register on the LOW-to-HIGH transition of the clock (CP). The asynchronous master reset (MR) input clears all eight outputs to LOW regardless of clock or data inputs. The 85 MHz maximum clock frequency supports high-speed serial data transfer. The 2.0V to 6.0V supply range covers 3.3V and 5V logic systems. The 74HC164 is widely used for I\/O expansion, LED display driving, and serial-to-parallel data conversion in embedded systems. The ,653 suffix indicates tape and reel packaging with 2500 units per reel.","working_principle":"The 74HC164D,653 consists of eight D-type flip-flops connected in series, with the output of each stage (Qn) connected to the D input of the next stage. Serial data enters through the AND gate formed by DSA and DSB: the AND output is high only when both DSA and DSB are high. This allows one input to gate the other for controlled data entry. On each LOW-to-HIGH clock transition, the AND gate output is captured into the first flip-flop (Q0), and all existing data shifts one position (Q0 to Q1, Q1 to Q2, etc.), with Q7 data lost. After eight clock cycles, a complete byte has been shifted in and all eight outputs are available in parallel. The asynchronous master reset (MR) forces all flip-flop outputs LOW immediately when asserted, regardless of clock or data states. The shift register has no output latch, so all outputs change as data shifts through, which must be considered in display applications where intermediate states may cause flicker.","pin_description":"
      Pin<\/th>Name<\/th>Type<\/th>Function<\/th><\/tr>
      1<\/td>DSA<\/td>Input<\/td>Serial data input A<\/td><\/tr>
      2<\/td>DSB<\/td>Input<\/td>Serial data input B<\/td><\/tr>
      3<\/td>Q0<\/td>Output<\/td>Parallel output bit 0<\/td><\/tr>
      4<\/td>Q1<\/td>Output<\/td>Parallel output bit 1<\/td><\/tr>
      5<\/td>Q2<\/td>Output<\/td>Parallel output bit 2<\/td><\/tr>
      6<\/td>Q3<\/td>Output<\/td>Parallel output bit 3<\/td><\/tr>
      7<\/td>GND<\/td>Power<\/td>Ground<\/td><\/tr>
      8<\/td>Q4<\/td>Output<\/td>Parallel output bit 4<\/td><\/tr>
      9<\/td>Q5<\/td>Output<\/td>Parallel output bit 5<\/td><\/tr>
      10<\/td>Q6<\/td>Output<\/td>Parallel output bit 6<\/td><\/tr>
      11<\/td>Q7<\/td>Output<\/td>Parallel output bit 7<\/td><\/tr>
      12<\/td>CP<\/td>Input<\/td>Clock input (rising edge)<\/td><\/tr>
      13<\/td>MR<\/td>Input<\/td>Master reset (active LOW)<\/td><\/tr>
      14<\/td>VCC<\/td>Power<\/td>Supply (2-6V)<\/td><\/tr><\/table>","application_scenarios":"
      • 3-digit 7-segment LED display driver using 3x 74HC164 daisy-chained from MCU SPI<\/li>
      • 16-channel relay board I\/O expansion with 2x 74HC164 in cascade<\/li>
      • Keypad row scanner with serial shift and parallel column read<\/li>
      • LED chaser\/light sequencer with 8 outputs from single MCU pin<\/li><\/ul>","alternative_models":"
        Manufacturer<\/th>Part Number<\/th>Package<\/th>Notes<\/th><\/tr>
        TI<\/td>SN74HC164DR<\/td>SOIC-14<\/td>Pin-compatible TI equivalent<\/td><\/tr>
        onsemi<\/td>MC74HC164DR2G<\/td>SOIC-14<\/td>Pin-compatible equivalent<\/td><\/tr>
        Nexperia<\/td>74HC164PW,118<\/td>TSSOP-14<\/td>Same function, smaller TSSOP package<\/td><\/tr>
        TI<\/td>SN74HC595DR<\/td>SOIC-16<\/td>8-bit shift register with output latch, upgrade<\/td><\/tr>
        Nexperia<\/td>74HC595D,118<\/td>SOIC-16<\/td>8-bit shift register with output latch, upgrade<\/td><\/tr><\/table>"},"_links":{"self":[{"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/posts\/6851","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/users\/2"}],"replies":[{"embeddable":true,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/comments?post=6851"}],"version-history":[{"count":0,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/posts\/6851\/revisions"}],"wp:attachment":[{"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/media?parent=6851"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/categories?post=6851"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/tags?post=6851"},{"taxonomy":"chip_brand","embeddable":true,"href":"https:\/\/ic-vendor.com\/zh\/wp-json\/wp\/v2\/chip_brand?post=6851"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}