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74HC02D

Quad 2-input NOR gate, 2.0-6.0V, SO14, 11ns tpd, CMOS logic, ±5.2mA drive

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Manufacturer Part：

74HC02D

Package：

SO14 (SOT108-1) 8.65 x 3.9 x 1.75 mm

Brand：

Product Categories：

Integrated Circuits ICs

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Description

Product Overview

The Nexperia 74HC02D is a quad 2-input NOR gate in an SO14 package. It operates from 2.0 V to 6.0 V, features CMOS low power dissipation with high noise immunity, and provides ±5.2 mA output drive. Ideal for combinational logic and digital control applications.

Key Specifications

Supply Voltage (VCC)	2.0 V to 6.0 V
Logic Family	74HC (CMOS)
Number of Gates	4 (Quad NOR)
Propagation Delay	11 ns (typical at 4.5V)
Output Drive	±5.2 mA
Operating Temperature	-40°C to +125°C
ESD Protection	HBM >2000V, CDM >1000V

Features

Wide supply voltage range from 2.0 V to 6.0 V
CMOS low power dissipation with high noise immunity
Input clamp diodes for interfacing to voltages above VCC
Latch-up performance exceeds 100 mA per JESD 78
Complies with JEDEC standards JESD8C and JESD7A

Applications

Combinational logic in digital control systems
Signal gating and control circuits
Automotive logic applications
Industrial automation logic

Product Introduction:74HC02D Product Introduction

The Nexperia 74HC02D is a quad 2-input NOR gate integrated circuit manufactured using advanced silicon-gate CMOS technology. The device provides four independent NOR gates in a single SO14 package. It operates over a supply voltage range of 2.0V to 6.0V and features CMOS low power dissipation combined with high noise immunity. Input clamp diodes enable interfacing to voltages in excess of VCC using current limiting resistors. The device is fully specified from -40°C to +125°C and complies with JEDEC standards JESD8C and JESD7A. ESD protection exceeds 2000V HBM and 1000V CDM. Latch-up performance exceeds 100 mA per JESD 78 Class II Level B.

Working Principle:74HC02D Working Principle

The 74HC02D contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = NOT (A OR B). The output is LOW when either or both inputs are HIGH; the output is HIGH only when both inputs are LOW. The CMOS input stage ensures low static power consumption with high input impedance. The output buffer provides ±5.2 mA drive capability, sufficient for driving multiple CMOS or TTL loads. Input clamp diodes protect the internal circuitry from voltage transients. The NOR gate is a fundamental logic building block, commonly used in combinational logic, flip-flop construction, and control signal generation.

Pin Description:74HC02D Pin Definition and Functions

Pin	Name	Type	Function
1	1Y	Output	NOR output for Gate 1
2	1A	Input	Data input for Gate 1
3	1B	Input	Data input for Gate 1
4	2Y	Output	NOR output for Gate 2
5	2A	Input	Data input for Gate 2
6	2B	Input	Data input for Gate 2
7	GND	Power	Ground (0 V)
8	3A	Input	Data input for Gate 3
9	3B	Input	Data input for Gate 3
10	3Y	Output	NOR output for Gate 3
11	4A	Input	Data input for Gate 4
12	4B	Input	Data input for Gate 4
13	4Y	Output	NOR output for Gate 4
14	VCC	Power	Supply voltage

Application Scenarios:In which products and applications is74HC02D used

Combinational logic in digital control systems
Signal gating and enable control circuits
Active LOW signal generation and decoding
Automotive electronic logic modules
Industrial automation safety interlock logic

Alternative Models:What chips are recommended as replacements for 74HC02D

Manufacturer	Part Number	Package	Notes
Texas Instruments	SN74HC02D	SOIC-14	Pin-to-pin compatible
onsemi	MC74HC02ADR2G	SOIC-14	Equivalent function
Toshiba	TC74HC02AP	DIP-14	Equivalent function
Nexperia	74HCT02D	SO14	TTL input level variant
STMicroelectronics	M74HC02RM13TR	SO-14	Pin-to-pin compatible