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CDCE62002RHBR

4-output clock generator/jitter cleaner, dual-VCO, <0.5ps jitter, SPI, VQFN-32

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جزء الشركة المصنعة ： جزء الشركة المصنعة

CDCE62002RHBR

الحزمة ： الحزمة

VQFN-32 (5.0 × 5.0 × 0.9 mm, 0.5mm pitch)

العلامة التجارية ： العلامة التجارية

فئات المنتجات:：فئات المنتجات

الدوائر المتكاملة الدوائر المتكاملة, واجهة ICs

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الوصف

نظرة عامة على المنتج

The CDCE62002RHBR is a four-output clock generator and jitter cleaner from Texas Instruments with integrated dual VCOs, packaged in a 32-pin VQFN (RHB) 5 × 5 mm package. It features a unique dual-VCO architecture spanning 1.750 GHz to 2.356 GHz, supporting output frequencies from 10.94 MHz to 1.175 GHz. The device achieves sub-0.5 ps RMS jitter performance and is configurable via SPI interface with integrated EEPROM for power-up configuration.

المواصفات الرئيسية

الوظيفة	4-Output Clock Generator / Jitter Cleaner
VCO Range	1.750 GHz to 2.356 GHz (dual VCO)
Input Frequency	1-500 MHz (diff), 2-42 MHz (xtal/aux)
Output Frequency	10.94 MHz to 1.175 GHz
Outputs	2 differential or 4 single-ended (LVPECL/LVDS/LVCMOS)
Jitter	< 0.5 ps RMS (10 kHz-20 MHz)
Phase Noise	-130 dBc/Hz at 1 MHz offset (Fc=491.52 MHz)
الواجهة	SPI (serial)
Supply	3.3V
الحزمة	VQFN-32 (5 × 5 mm)
درجة حرارة التشغيل	-40 درجة مئوية إلى +85 درجة مئوية

الميزات

Dual-VCO architecture covers 1.750 to 2.356 GHz for wide frequency range
Sub-0.5 ps RMS jitter performance in both generator and cleaner modes
Smart input multiplexer with automatic switching between two references
Integrated EEPROM for power-up configuration without SPI access
Partially integrated loop filter reduces external component count
Supports clock generation, jitter cleaning, and holdover modes

التطبيقات

Data converter clocking in wireless infrastructure
Optical transport network (OTN) timing and synchronization
Medical imaging (MRI/CT) system clock generation
Jitter cleaning for SERDES reference clocks
Test and measurement equipment timing

مقدمة المنتج:CDCE62002RHBR مقدمة المنتج

The CDCE62002 is a highly versatile clock generator and jitter cleaner that integrates dual VCOs, a fractional-N PLL, and four universal output drivers in a single 5 × 5 mm VQFN package. The unique dual-VCO architecture provides a continuous tuning range from 1.750 GHz to 2.356 GHz without VCO band gaps, enabling flexible frequency planning. The device can operate in multiple modes: as a frequency synthesizer generating clocks from a crystal reference, as a jitter cleaner filtering a noisy reference input, and in SERDES start-up mode. The smart input multiplexer automatically switches between two reference inputs, and the integrated EEPROM stores the configuration for autonomous power-up without SPI intervention.

مبدأ العمل:CDCE62002RHBR مبدأ العمل

The CDCE62002 operates as a PLL-based frequency synthesizer with jitter cleaning capability. One of two reference inputs (differential or crystal) feeds the input divider and phase-frequency detector. The dual-VCO architecture extends the VCO tuning range by combining two overlapping VCO bands, each with its own calibration circuit. The PLL feedback path includes programmable dividers that set the output-to-input frequency ratio. The partially integrated loop filter reduces the number of external components while still allowing loop bandwidth optimization for jitter cleaning. In jitter cleaner mode, a narrow loop bandwidth filters the reference input phase noise, while the VCO provides a clean output. In generator mode, a wider loop bandwidth follows the reference more closely. The SPI interface provides runtime configuration, while the EEPROM ensures the device starts up with the last programmed settings.

وصف الدبوس:CDCE62002RHBR تعريف الدبوس ووظائفه

دبوس	الاسم	النوع	الوظيفة
1	REF_SEL	المدخلات	Reference select — 0=REF0, 1=REF1
2	SDA/MOSI	الإدخال/الإخراج	SPI data input
3	SCL/SCLK	المدخلات	SPI clock input
4	CS_N	المدخلات	SPI chip select (active low)
5-6	REF0_N/REF0_P	المدخلات	Reference input 0 differential pair
7-8	REF1_N/REF1_P	المدخلات	Reference input 1 / crystal
9-10	XTAL_IN/XTAL_OUT	الإدخال/الإخراج	Crystal oscillator connections
11-12	OUT0_N/OUT0_P	المخرجات	Output 0 differential pair
13-14	OUT1_N/OUT1_P	المخرجات	Output 1 differential pair
15-16	OUT2_N/OUT2_P	المخرجات	Output 2 (or LVCMOS pair)
17-18	OUT3_N/OUT3_P	المخرجات	Output 3 (or LVCMOS pair)
19-22	VDD/GND	الطاقة	3.3V supply and ground
23-32	VDD/GND/NC/LD	Power/—/Output	Power, ground, no-connect, lock detect
EP	Thermal Pad	الطاقة	Exposed pad — connect to GND

Application Scenarios:In which products and applications isCDCE62002RHBR مستعمل

Wireless base station RF ADC/DAC sample clock with sub-ps jitter
OTN line card timing with automatic reference switchover and holdover
Medical ultrasound beamforming clock distribution with jitter cleaning
100GbE PHY reference clock generation with fractional-N synthesis
Test equipment reference clock generation with EEPROM power-up config

Alternative Models:What chips are recommended as replacements for CDCE62002RHBR

الشركة المصنعة	رقم الجزء	الحزمة	الملاحظات
TI	CDCM61004RHBR	VQFN-32	1:4 clock generator, no jitter cleaner
TI	LMK04828	WQFN-64	14-output, dual-PLL, JESD204B
رينيساس	8T49N242	QFN-48	Fractional-N, 4-output, jitter attenuator
مختبرات السيليكون	SI5341A	QFN-44	4-output, sub-100fs, Any-Frequency
الرقاقة الدقيقة	ZL30263	QFN-64	8-output SyncE clock