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LY68S6400BAIT

64Mb 1.8V SPI/QPI PSRAM, 133MHz, 8Mx8, self-refresh, DFN-8 (2x3mm)

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Pieza del fabricante：

LY68S6400BAIT

Paquete：

DFN-8 (2mm x 3mm)

Descripción

Productos

The LY68S6400BAIT is a 64Mb (8M x 8-bit) Serial Pseudo-SRAM (PSRAM) from Lyontek Inc., operating at 1.8V with SPI/QPI interface. It features a clock rate up to 133 MHz (non-page boundary crossing) and 84 MHz (page boundary crossing), with self-managed refresh and software reset. The BAIT variant is packaged in an 8-pin 2mm x 3mm DFN, ideal for space-constrained portable and IoT applications.

Especificaciones

Densidad	64Mb (8M x 8 bits)
Tensión de alimentación	1.65V to 1.95V
Interface	SPI / QPI (SDR mode)
Max Clock Rate	133 MHz (wrapped), 84 MHz (linear burst crossing)
Page Size	1024 bytes
Burst Mode	Linear or 32-byte wrapped
Refresh	Self-managed
Standby Current	200 µA max @ 85°C
Operating Current	40 mA max
Temperatura de funcionamiento	-40°C to +85°C
Paquete	8-pin DFN (2mm x 3mm)
Estado de las piezas	Activo

Características

64Mb SPI/QPI Serial Pseudo-SRAM at 1.8V
Self-managed refresh — no external DRAM refresh required
Clock rate up to 133 MHz (wrapped burst), 84 MHz (linear crossing)
Linear burst or 32-byte wrapped burst via toggle command
Software reset and built-in voltage sensor
50Ω output drive strength LVCMOS
Green / RoHS compliant package

Aplicaciones

Wearable and IoT devices
Portable consumer electronics
Smart home appliances
AR/VR near-eye displays
ESP32 / RP2350 PSRAM expansion

Introducción del producto:LY68S6400BAIT Presentación del producto

The LY68S6400BAIT is a 64Mb (8M x 8-bit) Serial Pseudo-SRAM from Lyontek Inc. operating at 1.8V with SPI and QPI interfaces. The PSRAM features self-managed refresh, eliminating the need for external DRAM refresh control and simplifying system design. With clock rates up to 133 MHz in wrapped burst mode and 84 MHz in linear burst with page boundary crossing, it delivers high bandwidth for embedded applications. The 8-pin 2mm x 3mm DFN package enables ultra-compact designs in wearable, IoT, and portable consumer electronics.

Principio de funcionamiento:LY68S6400BAIT Principio de funcionamiento

The LY68S6400 operates as a serial pseudo-SRAM using an internal DRAM array with integrated refresh management. The host accesses the memory through SPI or QPI commands. In SPI mode, data is transferred serially via SI/SIO[0] and SO/SIO[1]. In QPI mode, all four data lines SIO[0:3] transfer data simultaneously for 4x bandwidth. An internal refresh controller autonomously refreshes the DRAM cells, making the device appear as SRAM to the host. Linear burst mode allows continuous reads across page boundaries at up to 84 MHz, while wrapped burst reaches 133 MHz. Software reset restores the device to its default state.

Descripción de la clavija:LY68S6400BAIT Definición y funciones de las clavijas

Pin	Nombre	Tipo	Función
1	CE#	Entrada	Chip select, active low
2	SO/SIO[1]	E/S	Serial output / Quad data[1]
3	SIO[2]	E/S	Quad data[2] / WP#
4	VSS	Potencia	Suelo
5	SI/SIO[0]	E/S	Serial input / Quad data[0]
6	SCLK	Entrada	Clock signal
7	SIO[3]	E/S	Quad data[3] / HOLD#
8	VCC	Potencia	1.8V supply