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TPS6590378ZWSR

PMIC for Tegra processors, 4 DC-DC + 10 LDO, I2C/SPI, NFBGA-98

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Pieza del fabricante：

TPS6590378ZWSR

Paquete：

NFBGA-98 (5.5 × 5.5 × 0.9 mm)

Marca：
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Descripción

Productos

The TPS6590378ZWSR is a multi-regulator power management IC (PMIC) from Texas Instruments, packaged in a 98-pin NFBGA (ZWS) package. It is designed specifically for NVIDIA Tegra processor power management, integrating multiple DC-DC converters and LDO regulators in a single chip. The 8ZWSR variant indicates a specific configuration for a particular Tegra processor variant.

Especificaciones

Función Multi-Regulator PMIC for Tegra Processors
Convertidores CC-CC 4 (configurable)
LDO Regulators 10 (configurable)
Input Voltage 3.135V to 5.5V (SYS voltage)
Control Interface I2C / SPI
Load Switch Integrated
Paquete 98-pin NFBGA (5.5 × 5.5 mm)
Temperatura de funcionamiento -30°C to +85°C

Características

  • Designed for NVIDIA Tegra processor power management
  • Four DC-DC converters with configurable output voltages
  • Ten LDO regulators for analog and I/O power rails
  • I2C and SPI control interface for flexible configuration
  • Integrated load switches for power domain control
  • Power sequencing and voltage monitoring

Aplicaciones

  • NVIDIA Tegra-based automotive infotainment
  • Automotive navigation and cluster systems
  • Industrial vision processing platforms
  • Embedded computing with Tegra SoCs
  • Automotive ADAS camera systems

The TPS6590378 is a highly integrated power management IC designed specifically for NVIDIA Tegra processors. It integrates four DC-DC converters and ten LDO regulators, providing all the power rails required by the Tegra SoC in a single chip. The device supports I2C and SPI control interfaces for runtime voltage and sequencing configuration. The 8ZWSR variant defines the specific rail voltage and sequence configuration for a particular Tegra processor SKU. The compact NFBGA package minimizes PCB area while delivering the complete power solution for Tegra-based automotive infotainment, navigation, and ADAS systems.

The TPS6590378 integrates four high-efficiency DC-DC converters that provide the core processor rails (typically 0.7-1.4V at high current), along with ten LDO regulators for lower-current analog and I/O rails. A central state machine controls the power-up and power-down sequencing according to the Tegra processor’s requirements, ensuring rails come up in the correct order with appropriate timing. The I2C or SPI interface allows the host processor to dynamically adjust output voltages (for DVFS – Dynamic Voltage and Frequency Scaling), enable/disable individual rails, and monitor status. The device includes voltage monitoring with interrupt generation for undervoltage and overvoltage conditions. Integrated load switches allow controlled power routing to external subsystems.

Grupo Pin Nombre Tipo Función
A1-A8 SYS/VCC Potencia System supply input
B1-B8 DCDC1-4 Potencia DC-DC converter inputs/outputs
C1-C8 LDO1-10 Potencia LDO inputs/outputs
D1-D4 SCL/SDA E/S I2C control interface
D5-D8 CS/MOSI/MISO/SCLK E/S SPI control interface
E1-E4 nINT/nRST Salida Interrupt and reset outputs
E5-E8 EN/PWRON Entrada Enable and power-on inputs
F1-H8 GND/PGND Potencia Conexiones a tierra
  • Automotive infotainment head unit powered by NVIDIA Tegra
  • Digital instrument cluster with Tegra processor
  • Automotive ADAS camera processing platform
  • Industrial vision and AI edge computing with Tegra
  • Navigation system with Tegra SoC and PMIC integration
Fabricante Número de pieza Paquete Notas
TI TPS6590377ZWSR NFBGA-98 Different Tegra configuration variant
TI TPS659039 NFBGA-98 PMIC for different Tegra generation
TI TPS80031 NFBGA-98 PMIC for OMAP/Tegra applications
Maxim MAX77620 WLP-98 PMIC for Tegra, similar integration
Renesas PMIC for Tegra BGA-XX Alternative PMIC platform
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For service consultation or packaging customization, please feel free to contact us:
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Address: Room 2919, Guoli Building, Huaqiang North, Futian District, Shenzhen, Guangdong, China
 

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