产品概览
The GTL2014PWZ from NXP is a 4-bit GTL (Gunning Transceiver Logic) to LVTTL level translator with >200 MHz bandwidth. It converts GTL backplane signals (typically 0.6V-1.5V) to 3.3V LVTTL levels for processor or FPGA interface.
主要规格
| 功能 | 4-bit GTL-to-TTL level translator |
| 渠道 | 4 (unidirectional GTL to LVTTL) |
| GTL Reference | External Vref (0.6-1.5V) |
| LVTTL Supply | 3.3V |
| Bandwidth | >200 MHz |
| 包装 | TSSOP-20 (6.5×4.4mm) |
工作原理
Four unidirectional channels translate GTL open-drain signals (referenced to an external VREF, typically 0.8V) to LVTTL levels. GTL receivers compare incoming signals against VREF and drive CMOS outputs at 3.3V LVTTL levels. This enables direct connection between GTL backplanes and LVTTL logic without external resistors.
应用
- GTL backplane to LVTTL interface
- Server / workstation bus bridging
- Memory controller interface