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LP3982ILDX-ADJ/NOPB

300 mA adjustable LDO, 2.5–6 V, 120 mV dropout, 37 µVrms noise, 60 dB PSRR, 8-WSON

10771

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Pieza del fabricante：

LP3982ILDX-ADJ/NOPB

Paquete：

8-WSON (NGM) — 2.5 x 3.0 mm

Marca：
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Compromiso de calidad
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Descripción

Productos

The LP3982ILDX-ADJ/NOPB is a 300 mA ultra-low-dropout CMOS LDO regulator from Texas Instruments with adjustable output voltage. Packaged in an 8-pin WSON (NGM), it operates from 2.5 V to 6 V input and offers output voltage adjustable from 1.25 V to 6 V. The device features low noise (37 µVrms), high PSRR (60 dB), and a power-good flag, making it ideal for noise-sensitive analog and RF applications.

Especificaciones

Output Voltage 1.25 V to 6 V (Adjustable)
Corriente de salida 300 mA
Input Voltage Range 2.5 V to 6 V
Dropout Voltage 120 mV typical at 300 mA
Corriente de reposo 90 µA typical
Output Noise 37 µVrms (10 Hz to 100 kHz)
Paquete 8-WSON (NGM) — 2.5 x 3.0 mm
Temperatura de funcionamiento -40°C to +85°C

Características

  • Ultra-low dropout: 120 mV at 300 mA
  • Very low noise: 37 µVrms (10 Hz–100 kHz)
  • High PSRR: 60 dB typical at 1 kHz
  • Power-good flag output for supply monitoring
  • 1 nA shutdown current for battery conservation

Aplicaciones

  • RF and wireless transceiver power supplies
  • Audio codec and DAC supply filtering
  • Battery-powered portable instruments
  • DSP and microcontroller core voltage regulation
  • Camera module power supplies

The LP3982 is a micropower, ultra-low-dropout, low-noise 300 mA CMOS regulator from Texas Instruments. Available in adjustable and fixed voltage versions, the device is pin- and package-compatible with the Maxim MAX8860. The PMOS pass transistor provides very low dropout voltage and consumes negligible drive current compared to PNP-based LDOs. The adjustable version uses an external resistor divider to set the output voltage from 1.25 V to 6 V. With 37 µVrms output noise and 60 dB PSRR, the LP3982 is ideal for noise-sensitive RF and analog circuits.

The LP3982 uses a PMOS pass transistor in a feedback-regulated LDO topology. The output voltage is sensed through an external resistor divider (adjustable version) and compared against an internal 1.25 V bandgap reference by the error amplifier. The error amplifier drives the PMOS gate to maintain regulation. A noise bypass capacitor on the CC pin filters the bandgap reference, reducing output noise to 37 µVrms. The FAULT pin provides an open-drain power-good indicator that pulls low when the output drops out of regulation. The SHDN pin enables/disables the regulator with 1 nA shutdown current.

Pin Nombre Tipo Función
1 VIN Entrada Input supply voltage (2.5–6 V)
2 GND Potencia Referencia del suelo
3 SHDN Entrada Shutdown control (high = enabled)
4 SET Entrada Feedback / output voltage adjust
5 CC E/S Noise bypass capacitor connection
6 FALLO Salida Power-good flag (open drain, low = fault)
7 VOUT Salida Regulated output voltage
8 GND Potencia Ground / thermal pad
  • Low-noise power supply for RF transceivers and LNAs
  • Audio codec and high-resolution DAC supply regulation
  • Camera sensor module power with clean output
  • Portable medical device analog supply
  • PLL and oscillator supply filtering
Fabricante Número de pieza Paquete Notas
TI LP3982IMM-ADJ/NOPB 8-VSSOP Same function, VSSOP package
Maxim MAX8860EUA30+ 8-µMAX Pin-compatible, fixed 3.0 V
TI TPS73701DCQR 6-SOT-223 1 A LDO, higher current, adj
Dispositivos analógicos ADP122AUJZ-ADJ-R7 5-TSOT 500 mA LDO, adjustable
Microchip MCP1824T-ADJE/DC 5-SOT-23 300 mA, adj, smaller package
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