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SN74HC573APWR

Octal transparent D-latch, 3-state outputs, 2-6V, TSSOP-20

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Pieza del fabricante：

SN74HC573APWR

Paquete：

TSSOP-20 (6.5 × 4.4 × 1.0 mm)

Marca：
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Compromiso de calidad
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Descripción

Productos

The SN74HC573APWR is an octal transparent D-type latch with 3-state outputs from Texas Instruments, packaged in a 20-pin TSSOP (PW) package. It features a single output enable and latch enable control, making it ideal for bus-oriented applications where data must be held while other devices access the bus. The HC family provides wide VCC range operation from 2V to 6V.

Especificaciones

Función Octal Transparent D-Type Latch
Bits 8
Tensión de alimentación 2V to 6V
Output Type 3-State
Retardo de propagación 15ns (typ) at 4.5V
Enable Output Enable (OE) + Latch Enable (LE)
Paquete 20-pin TSSOP (6.5 × 4.4 mm)
Temperatura de funcionamiento -40°C to +85°C

Características

  • Octal (8-bit) transparent latch in a single device
  • 3-state outputs for bus-oriented applications
  • Transparent latch operation — outputs follow inputs when LE is high
  • Output enable for bus sharing and isolation
  • Wide VCC operating range: 2V to 6V
  • HC family CMOS technology for low power consumption

Aplicaciones

  • Microprocessor address/data bus latching
  • I/O port expansion and bus buffering
  • Memory address register holding
  • LED display data latching
  • General-purpose data storage and isolation

The SN74HC573A is an octal transparent D-type latch with 3-state outputs from Texas Instruments’ high-speed CMOS logic family. It features eight D-type latches with a common latch enable (LE) and output enable (OE) control. When LE is high, the Q outputs follow the D inputs (transparent mode). When LE goes low, the outputs are latched and retain the data that was present at the inputs before the transition. The 3-state output enable allows the device to be connected directly to a system bus, enabling bus sharing with other devices. The wide 2V to 6V VCC range and low power consumption make it versatile for both 3.3V and 5V systems.

The SN74HC573A contains eight transparent D-type latches. When the latch enable (LE) input is high, data on the D inputs flows through to the Q outputs (transparent mode). When LE transitions from high to low, the data present at the D inputs at that moment is latched and held on the Q outputs. The output enable (OE) is an active-low control that, when asserted, places all eight outputs in a high-impedance (3-state) condition. This allows multiple devices to share a common bus without contention. When OE is high, the outputs are active and drive either high or low logic levels based on the latched data. The 3-state capability combined with the octal width makes this device ideal for microprocessor bus interfacing and data routing.

Pin Nombre Tipo Función
1 OE Entrada Output enable — active low, high-Z when high
2 D0 Entrada Data input 0
3 D1 Entrada Entrada de datos 1
4 D2 Entrada Entrada de datos 2
5 D3 Entrada Entrada de datos 3
6 D4 Entrada Entrada de datos 4
7 D5 Entrada Entrada de datos 5
8 D6 Entrada Entrada de datos 6
9 D7 Entrada Entrada de datos 7
10 GND Potencia Suelo
11 LE Entrada Latch enable — high = transparent, low = latched
12 Q7 Salida Data output 7
13 Q6 Salida Data output 6
14 Q5 Salida Data output 5
15 Q4 Salida Data output 4
16 Q3 Salida Data output 3
17 Q2 Salida Data output 2
18 Q1 Salida Data output 1
19 Q0 Salida Data output 0
20 VCC Potencia Supply voltage (2-6V)
  • Microprocessor address bus latching in memory-mapped I/O
  • I/O port expansion for embedded controllers
  • Data bus isolation between processor and peripherals
  • LED display multiplexing data register
  • PLC digital I/O module data holding
Fabricante Número de pieza Paquete Notas
TI SN74HC573ADWR SOIC-20 Same function, wider SOIC package
TI SN74HC573ANSR SO-20 Same function, different package option
NXP 74HC573PW TSSOP-20 Pin-compatible equivalent
onsemi MC74HC573ADW SOIC-20 HC octal latch equivalent
Renesas 74HC573T TSSOP-20 Equivalent octal latch
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