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NC7SZ175P6

Single D flip-flop with set/reset, 1.65-5.5V, 4.6ns, SC-70-6 TinyLogic, async PRE/CLR

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Manufacturer Part：

NC7SZ175P6

Package：

SC-70-6 (SOT-363) 2.1 x 2.0 x 1.0 mm

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Product Categories：

Integrated Circuits ICs

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Description

Product Overview

The onsemi NC7SZ175P6 is a single D-type flip-flop with set and reset capabilities in an ultra-compact SC-70-6 (SOT-363) package. Operating from 1.65V to 5.5V with 4.6 ns propagation delay at 5V, this TinyLogic device features edge-triggered clock input, asynchronous set and reset, and CMOS output drive, making it ideal for high-density portable and consumer electronics.

Key Specifications

Logic Function	Single D-Type Flip-Flop with Set/Reset
Supply Voltage	1.65 V to 5.5 V
Propagation Delay (tpd)	4.6 ns (Typ @ 5V)
Trigger Type	Positive Edge (Rising)
Set/Reset	Asynchronous, Active Low
Output Drive	plus/minus 8 mA
Operating Temperature	-55C to +125C
Package	SC-70-6 (SOT-363)

Features

Ultra-compact SC-70-6 package for high-density PCB designs
Wide operating voltage range from 1.65V to 5.5V supports mixed-voltage systems
Asynchronous set (PRE) and reset (CLR) inputs for flexible control
Positive edge-triggered clock for reliable data latching
High-speed operation with 4.6 ns propagation delay at 5V
Low static current of 1 microA maximum
Inputs tolerate voltages up to 5.5V independent of VCC
Pb-Free, RoHS compliant

Applications

Flip-flop and register elements in portable devices
Debounce circuits for mechanical switches
Frequency division and clock synchronization
Power sequencing and reset delay circuits
General-purpose digital logic in space-constrained designs

Product Introduction:NC7SZ175P6 Product Introduction

The onsemi NC7SZ175P6 is a single D-type flip-flop with asynchronous preset (PRE) and clear (CLR) inputs, housed in the ultra-compact SC-70-6 (SOT-363) package. As part of the TinyLogic UHS (Ultra High Speed) family, the device operates over a wide supply voltage range of 1.65V to 5.5V, making it suitable for both 1.8V and 5V system designs. Data on the D input is transferred to the Q output on the rising edge of the clock (CLK). The asynchronous PRE and CLR inputs allow the output to be set or cleared independently of the clock signal. With a propagation delay of only 4.6 ns at 5V and low static current of 1 microA, the device delivers high performance with minimal power consumption. The inputs are overvoltage tolerant to 5.5V regardless of VCC, supporting live insertion and mixed-voltage interfacing.

Working Principle:NC7SZ175P6 Working Principle

The NC7SZ175P6 implements a single edge-triggered D-type flip-flop. On the rising edge of CLK, the data present at the D input is sampled and transferred to the Q output, where it remains until the next rising clock edge or until a set/reset operation occurs. The asynchronous PRE (preset) input, when driven LOW, immediately sets Q HIGH regardless of the clock or D input. Similarly, the asynchronous CLR (clear) input, when driven LOW, immediately resets Q LOW. If both PRE and CLR are driven LOW simultaneously, both Q and not-Q outputs go HIGH (illegal state) — this condition should be avoided. The flip-flop uses a master-slave architecture with transmission gates and inverters to ensure reliable edge-triggered operation. The overvoltage-tolerant input structure allows input signals up to 5.5V even when VCC is as low as 1.65V, enabling level-shifting between voltage domains. The CMOS output buffer provides plus/minus 8 mA drive capability.

Pin Description:NC7SZ175P6 Pin Definition and Functions

Pin	Name	Type	Function
1	CLR	Input	Asynchronous clear (active low) — forces Q LOW
2	D	Input	Data input — sampled on rising edge of CLK
3	CLK	Input	Clock input — rising edge triggers data transfer
4	PRE	Input	Asynchronous preset (active low) — forces Q HIGH
5	Q	Output	Flip-flop output
6	VCC	Power	Supply voltage (1.65V to 5.5V)

Application Scenarios:In which products and applications isNC7SZ175P6 used

Switch debounce circuit with D flip-flop and RC network
Clock domain synchronization for asynchronous signals
Frequency divider chain in clock generation circuits
Power-on reset generation with RC delay on D input
State machine element in compact digital logic designs

Alternative Models:What chips are recommended as replacements for NC7SZ175P6

Manufacturer	Part Number	Package	Notes
onsemi	NC7SZ175P6X	SC-70-6	Tape and reel packaging
Texas Instruments	SN74LVC1G74DCKR	SC-70-6	Pin-compatible equivalent
Nexperia	74LVC1G74GW	TSSOP-6	Similar D flip-flop with set/reset
onsemi	NC7SV175P6X	SC-70-6	Lower voltage variant (1.65V optimized)
STMicroelectronics	74LVC1G74SE	SOT-363	Equivalent single D flip-flop