Product Overview
The AM3352BZCZ100 is a TI Sitara ARM Cortex-A8 processor up to 600MHz. 256KB L2 cache. Two PRU-ICSS units for real-time industrial communication. Dual Gigabit Ethernet MACs. No 3D graphics accelerator (AM3352 variant). External DDR memory interface. NFBGA-324 package. Widely used in BeagleBone Black.
Key Specifications
| Type | Sitara ARM Cortex-A8 Microprocessor |
| Core | Cortex-A8 |
| Clock | 1 GHz max (this grade: 600MHz) |
| L2 Cache | 256 KB |
| SGX530 | Not included (AM3352 variant) |
| PRU-ICSS | 2 units (PRU0, PRU1) |
| RAM | External DDR2/3/mDDR/LPDDR |
| Interface | Gigabit EMACx2, USB2.0 OTG, MMC/SD, CAN, UART, SPI, I2C |
| Operating Temp | 0 to +90C (Industrial) |
| Package | ZCE (NFBGA-324, 15x15mm) |
Working Principle
The Cortex-A8 core features a 13-stage pipeline with NEON SIMD engine for signal processing. The Power/Reset/Clock Management (PRCM) module handles power domains and clock gating. The Programmable Real-time Unit (PRU-ICSS) contains two 32-bit RISC cores running at 200MHz for deterministic I/O operations like EtherCAT, PROFINET, and EnDat. The EMAC subsystem integrates MAC, MDIO, and DMA for Gigabit Ethernet. The memory controller supports DDR2, DDR3L, mDDR, and LPDDR0 with programmable timing.
Applications
- BeagleBone Black
- Industrial communication
- Human-machine interface
- Embedded Linux